I have a project in computer architecture
The LC-2200 system as presented in
the textbook has been used since Chapter 1 to illustrate and explain the
concepts
For this project, you will design the LC-505 Computer that is an
extension of the LC-2200. The next section in this document presents a
detailed description of the LC-2200. You should also use the textbook to
get further information on the LC-2200. Your task is to design a new
system by extending in some reasonable way the LC-2200. To the extent
that you can, you are to show the corresponding hardware components
necessary for changes to either the instruction set or to the processing
techniques. For example, let’s say that you proposed a new command,
called NEWopp, that performs arithmetic operations requiring 4 operands;
the new datapath might include an extra ALU. Another example would be
if you proposed a 6-staged pipeline for handling multiple instructions,
you could show what additional buffers/components might be necessary.
The last section of your paper (at least 1 1/2 pages) should be a
comparison between the LC-2000 instruction set and another instruction
set. You can use the following link to a Wikipedia page on computer architectures.
The article compares several computer architectures and includes a
table of different instruction sets. Choose one instruction set and
compare it to the LC-2000.
You may use any concept from topics that we’ve covered in class.
Obviously, the more thought you put into it and the more detailed your
design (and your rationale for your design decisions),the better. The
final document that you turn in should be 7-9 pages (not including
references).
The LC-2200 Instruction-Set Architecture
Figure 1: The LC-2200-16 Datapath (Conceptual)
The LC-2200-16 (Little Computer 2200-16 bits) is very simple, but it is
general enough to solve complex problems. This section describes the
instruction set and instruction format of the LC-2200. The LC-2200 is a
16-register, 16-bit computer. All addresses are word-addresses.
Although, the 16 registers are known as general
purpose they are generally assigned special duties by software convention.
Reg#
Name
Use
Callee
Save?
0
$zero
always zero (by hardware)
n.a.
1
$at
reserved for assembler
n.a.
2
$v0
return value
no
3
$a0
argument
no
4
$a1
argument
no
5
$a2
argument
no
6
$t0
temporary
no
7
$t1
temporary
no
8
$t2
temporary
no
9
$s0
saved register
YES
10
$s1
saved register
YES
11
$s2
saved register
YES
12
$k0
reserved for OS/traps
n.a.
13
$sp
stack pointer
no
14
$pr
page register (not used)
YES
15
$ra
return address
no
Register 0: This register will always contain zero when read from. As an
additional feature it may be written to in those cases where a value is not
needed.
Register 1: Although this is a general purpose register
by convention, programmers should not use it. It may be used by the
assembler when processing pseudo-instructions.
Register 2: Is designated as the register used to return values from
functions.
Registers 3-5: Are designated to be used for passing
arguments to functions.
Registers 6-8: Are designated for temporary variables.
Note: When calling a function the programmer should assume
that the contents of registers 2-8 that were present when the call was made
will no longer be valid. Thus, if needed after the call those values should be
saved by the programmer calling the function.
Registers 9-11: These are saved registers. The
caller of a function may assume that once the function returns the values that
were in these registers before the call will still be there.
Note: This implies that a programmer writing a function that
wishes to use these registers should first save them (most likely on the
activation stack), then use them and then restore them before returning control
to the caller
Register 12: This register is reserved for handling interrupts.
Register 13: The stack pointer which is used to keep track of the location
of the top of the activation stack.
Register 14: The page register. This is legacy from the 8 bit days, feel free to ignore it for this project.
Register 15: When a function is called the JALR instruction will save the
address to return to and by convention this register is used for that purpose.
Instructions
There are 5 instruction formats (bit 0 is the least-
significant bit).
R-type instructions (add, nand):
bits 15-13: opcode
bits 12-9: RX
bits 8-5: RY
bits 4-1: RZ
bit 0: unused
I-type instructions (addi, lw, sw, beq):
bits 15-13: opcode
bits 12-9: RX
bits 8-5: RY
bits 4-0: offsetField (a 5-bit, 2’s complement number with a range of -16 to 15)
J-type instructions (jalr):
bits 15-13: opcode
bits 12-9: RX
bits 8-5: RY
bits 4-0: unused (should all be 0)
S-type instructions (halt):
bits 15-13: opcode
bits 12-0: unused (should all be 0)
Symbolic instructions should follow the same layout. For example, the add
instruction is written in assembly as:
add
——————————————————————
Table 1: Description of Machine Instructions
——————————————————————
Assembly language
Opcode (binary name for instruction)
Action
(bits 15-13)
add (R-type format)
000
Add contents of RY with contents of RZ, store results in RX.
ex: add $v0, $a0, $a1
nand (R-type format)
001
Nand contents of RY with contents of RZ, store results in RX.
ex: nand $v0, $a0, $a1
addi (I-type format)
010
Add contents of RY to contents of offset field and store result in RX.
ex: addi $v0, $a0, 25
lw (I-type format)
011
Load RX from memory. Memory address is formed by adding offsetField
with the contents of RY.
ex: lw $v0, 0x42($sp)
sw (I-type format)
100
Store RX into memory. Memory address is formed by adding offsetField
with the contents of RY.
ex: sw $a0, 0x42($sp)
beq (I-type format)
101
Compare the contents of RX and RY; if they are the same, then branch to
the address PC 1 offsetField, where PC is the address
of the beq instruction.
ex: beq $a0, $a1, done
jalr (J-type format)
110
First store PC 1 into RY where PC is the address of the jalr instruction.
Then branch to the address now contained in RX. Note that if RX is the
same as RY, the processor will first store PC 1 into that register,
then end up branching to PC 1.
ex: jalr $at, $ ra
halt (S-type format)
111
Halts the processor.
ex: halt
noop
–
No operation: does nothing
ex: noop (actually emits add $zero, $zero, $zero)
.byte(pseudo-op)
–
fill word with a value.
ex: .byte 32
The assembler supports labels which represent the address of the line.
If a label is used in a beq instruction, it will evaluate to the
relative offset.
Example:
(address 0): add $s0, $zero, $zero
(address 1): loop: addi $s0, $s0, -1
(address 2): beq $s0, $zero, end
(address 3): beq $zero, $zero, loop
(address 4): end: halt
becomes
(address 0): 000 1001 0000 0000 0 or 0x1200
(address 1): 010 1001 1001 11111 or 0x533F
(address 2): 101 1001 0000 00001 or 0xB201
(address 3): 101 0000 0000 11101 or 0xA01D
(address 4): 111 00000000000 00 or oxE000